D. Eisenbiegler, K. Schneider, R. Kumar
"A
Functional Approach for Formalizing Regular Hardware Structures"
TPHOL '93, Higher Order Logic Theorem Proving and Its
Applications
11.-13. August 1993, Vancouver, Canada
Springer-Verlag, Lecture Notes in Computer Science (v. 780), p.
101-114
ISBN 3-540-57826-9
D. Eisenbiegler, R. Kumar
"Evaluation Techniques as
a Part of the Verification Process"
TPHOL '94, Higher Order
Logic Theorem Proving and Its Applications
19.-22. September
1994, Valetta, Malta
supplementary proceedings
D. Eisenbiegler, R. Kumar
TPHOL '95, Higher Order Logic Theorem Proving and Its
Applications
Aspen Grove, Utah, USA, 11.-14. September 1995
Springer-Verlag, Lecture Notes in Computer Science (v. 780), p.
154-169
ISBN 3-540-60275-5
D. Eisenbiegler, R. Kumar
"Formally
Embedding Existing High Level Synthesis Algorithms"
CHARME
'95, Correct Hardware Design and Verification Methods
2.-4.
Oktober 1995, Frankfurt am Main
Springer-Verlag, Lecture Notes
in Computer Science (v. 987), p. 71-83
ISBN 3-540-60385-9
D. Eisenbiegler, R. Kumar, J. Müller
APCHDL'96, Asia Pacific Conference on Hardware Description
Languages
8.-10. Januar 1996, Bangalore, Indien
R. Kumar, D. Eisenbiegler
"Synthese
von Verhaltensbeschreibungen in VHDL mittels logischer
Transformationen"
GI/ITG/GME '96, Tagung der Fachgruppe
"Methoden des Entwurfs und der Verifikation digitaler Systeme"
18.-20. März 1996, Kreischa (bei Dresden)
Shaker
Verlag, Berichte aus der Informatik, p.11-20
ISBN 3-8265-1321-5
D. Eisenbiegler, C. Blumenröhr and R. Kumar
"Implementation Issues about the
Embedding of Existing High Level Synthesis Algorithms in HOL"
TPHOL'96, Theorem Proving in Higher Order Logic
26.-30.
August 1996, Turku Finnland
Springer-Verlag, Lecture Notes in
Computer Science (v. 1125), p. 157-172
ISBN 3-540-61587-3
R. Kumar, C. Blumenröhr, D. Eisenbiegler and D. Schmid
"Formal Synthesis in Circuit Design -
A Classification and Survey"
FMCAD'96, Formal Methods
in Computer-Aided Design
6.-8. November 1996, Palo Alto,
California, USA
Springer-Verlag, Lecture Notes in Computer
Science (v. 1166), p.294-309
ISBN 3-540-61937-2
C. Blumenröhr, D. Eisenbiegler, R. Kumar
"Applicability
of Formal Synthesis Illustrated via Scheduling"
IWLAS'96,
International Workshop on Logic and Architecture Synthesis
16.-18.
Dezember 1996, Grenoble, Frankreich
D. Eisenbiegler, R. Kumar, C. Blumenröhr
"A
Constructive Approach towards Correctness of Synthesis - Application
within Retiming"
EDTC'97, European Design and Test
Conference
17.-20. März 1997, Paris, Frankreich
IEEE
Computer Society Press, p. 427-431
ISBN 0-8186-7786-4
D. Eisenbiegler
"Possibilities,
Limitations and Problems in Retiming - a View from a Logical
Perspective"
GI/ITG/GME '97, Tagung der Fachgruppe
"Methoden des Entwurfs und der Verifikation digitaler Systeme"
9.-11. April 1997, Linz, Österreich
Universitätsverlag
Rudolf Trauner, p.139-148
ISBN 3-85320-826-6
C. Blumenröhr, D. Eisenbiegler
"An
Efficient Representation for Formal Synthesis"
ISSS'97,
International Symposium on System Synthesis
17.-19. September
1997, Antwerpen, Belgien
IEEE Computer Society, p. 9-15
ISBN
0-8186-7949-2
C. Blumenröhr, D. Eisenbiegler
"Deriving
Structural RT-Implementations from Algorithmic Descriptions by means
of Logical Transformations"
GI/ITG/GME '98, Tagung der
Fachgruppe "Methoden des Entwurfs und der Verifikation
digitaler Systeme"
9.-11. März 1998, Paderborn
HNI-Verlagsschriftenreihe (Band 36), p.38-49
ISBN
3-931466-35-3
C. Blumenröhr, D. Eisenbiegler
"Performing
High-Level Synthesis via Program Transformations within a Theorem
Prover"
Euromicro'98, European Conference on
Microelectronics
25.-27. August 1998, Västerås,
Schweden
IEEE Computer Society, Volume 1, p.34-37
ISBN
0-8186-8646-4
D. Eisenbiegler, C. Blumenröhr
"Gropius
- a Hardware Description Language for the Reuse of Designs"
Reuse'98, Reuse Techniques for VLSI Design
14. September
1998, Forschungszentrum Informatik, Karlsruhe
FZI-Bericht
3-13-9/98, p.93-104
D. Eisenbiegler, R. Kumar
"ABC-VHDL,
A Synchronous VHDL Subset with a Formal Semantics in HOL"
FZI
Report 8/95
D. Eisenbiegler
"Automata - A
Theory Dedicated towards Formal Circuit Synthesis"
Technischer Bericht, Fakultät für Informatik,
Universität Karlsruhe
D. Eisenbiegler, C. Blumenröhr
"Reuse
Concepts in Gropius"
in "Reuse Techniques for VLSI
Design",
Kluwer Academic Publishers, March 1999
ISBN
0-7923-8476-8
C. Blumenröhr, D. Eisenbiegler, D. Schmid
"On
the Efficiency of Formal Synthesis - Experimental Results"
IEEE Transactions on Computer-Aided Design of Intergrated
Circuits and Systems,
Volume 18, No 1, January 1999, p.25-32
ISSN 0278-0070
D. Eisenbiegler
"Ein
Kalkül für die Formale Schaltungssynthese"
Promotionsarbeit, 24. November 1998
Logos Verlag Berlin,
1999
ISBN 3-89722-197-7